The present invention relates to a semiconductor device and in particular to a technique effectively applicable to a semiconductor device having power MISFETs (Metal Insulator Semiconductor Field Effect Transistors).
For example, Patent Documents 1 and 2 disclose semiconductor devices for driving a three-phase motor.
For example, Patent Documents 3 and 4 disclose semiconductor devices for DC-DC converter.
For example, Patent Document 5 discloses a processing method for HSOP.    [Patent Document 1] Japanese Unexamined Patent Publication No. 2004-273749 (FIG. 1)    [Patent Document 2] Japanese Unexamined Patent Publication No. 2003-197862 (FIG. 3)    [Patent Document 3] Japanese Unexamined Patent Publication No. 2003-124436 (FIG. 5)    [Patent Document 4] Japanese Unexamined Patent Publication No. 2003-332518 (FIG. 17)    [Patent Document 5] Japanese Unexamined Patent Publication No. 2002-110882 (FIG. 1)
For example, when a circuit for driving a vehicle-mounted motor or any other like motor is constructed, a plurality of MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are used for this purpose. The plurality of MOSFETs are independently formed in a plurality of packages. The circuit for driving a motor is constructed by mounting these plurality of packages over a mounting board.
In this case, a problem arises because a plurality of semiconductor devices are mounted. A footprint is increased, and downsizing is infeasible.
Consequently, the present inventors considered multi (plural) chip packages (semiconductor devices) of high heat radiation type which allow footprints to be reduced.
A DC-DC converter having two MOSFETs (semiconductor chips) will be taken as an example. In cases where the DC-DC converter has two semiconductor chips mounted over a tab and two MOSFETs are nMOSFET and pMOSFET, a drain can be shared between them. Therefore, the tab need not be divided, and the DC-DC converter is of such construction that two semiconductor chips are mounted over one tab.
In cases where two MOSFETs are both nMOSFET in a DC-DC converter, a drain cannot be shared between them. Therefore, it is required to divide a tab into one for the high-side semiconductor chip of one nMOSFET and one for the low-side semiconductor chip of the other nMOSFET. Thus, the DC-DC converter is of such construction that a semiconductor chip containing an nMOSFET is mounted over each of the two divided tabs. (Refer to Patent Document 3)
That is, in a DC-DC converter having two MOSFETs (semiconductor chips), a tab is so constructed that it is not divided as in the former of the above examples or so constructed that it is divided into two as in the latter.
In the technology disclosed in Patent Document 1 (Japanese Unexamined Patent Publication No. 2004-273749), a wire is connected to a frame. Therefore, the following problem arises: it is required to ensure areas for wire connection in frames, and this imposes limitation on chip size.
In addition, the following problem can also arise: since wires are bonded astride frames, the switching noise of a low-side transistor element adversely affects a high-side transistor element via the inductance of a wire. As a result, the high-side transistor element can be caused to malfunction.